Compared to software, the open source approach is relatively new to most actors in the field of (mechanical) hardware. Plus Open Source Hardware faces some special issues. A yet missing definition of its "source code" is one of them (+ patent law, liability, engineers that do not know how to work with git, costly prototyping…).
DIN SPEC 3105 will be/is the first official standard for Open Source Hardware and also the first official standard ever published under a free license (CC-BY-SA 4.0; that was a lot of lobby work ;) ). It defines the technology-specific "source" of Open Source Hardware and aims to build a bridge between research institutes, public authority, industry and the worldwide open source community.

In this talk I won't explain why Open Source (Hardware) is great. I assume, you all know that (if not, still feel free to ask me in the Q&A part or after the talk). I'll describe what's the standard for, how it works and why its great for Open Source Hardware.

Since the Snowden revelations the fear of stealthy hardware manipulations is no longer regarded as far fetched.
This fear is also reflected in the massive discussions sparked by last year's Bloomberg allegations on a supposed hardware spy implant on Supermicro serverboards or the recent USA ban on Huawei telecommunication equipment.

Hardware reverse engineering (HRE) is a promising method to detect such manipulations or hidden backdoors.
However, HRE is a highly complex and cumbersome task.
It takes months of work as well as expensive equipment to even obtain the netlist of a chip, the equivalent to the binary in software reverse engineering (SRE).
In contrast to SRE where various paid or open-source tools for binary analysis exist, e.g., IDA Pro or Ghidra, in HRE simply no tool for netlist analysis were available - neither commercial, nor free.
To close this gap, researchers from the Ruhr University Bochum developed HAL, the first open-source netlist analysis framework.

In this talk, we start with a basic introduction into the challenges of HRE.
Then, we demonstrate the capabilities of HAL before giving a brief overview on our current research with HAL.

Hardware reverse engineering (HRE) is an important technique for analysts to understand the internals of a physical system.
Use cases range from recovering interface specifications of old chips, over detection of malicious manipulations or patent infringements, to straight up counterfeiting.
However, HRE is a notably complex and cumbersome task which consists of two phases:
In the first phase the netlist, i.e., circuit description of a chip, has to be extracted from the physical device.
Such a netlist is equivalent to the binary in software reverse engineering (SRE).
In the second phase, the analyst then processes the netlist in order to understand (parts of) its functionality.

However, obtaining a netlist from a chip can take several months and requires professional and costly equipment as well as expertise.
Even with a recovered netlist, understanding its functionality is an enormously challenging task.
This is partly due to the lack of proper tools for netlist analysis:
While in SRE various commercial or open-source tools for binary analysis exist, e.g., IDA Pro or Ghidra, in HRE simply no tool for netlist analysis was available, neither commercial, nor free.
To close this gap, researchers from the Embedded Security group of the Horst-Görtz Institute for IT-Security at the Ruhr University Bochum developed HAL, the first open-source netlist analysis framework.
Inspired by the modularity of its SRE equivalents, HAL can be extended through optimized C++ plugins or directly used as a Python library, while at the same time offering a GUI for explorative and interactive analysis.
The project is supposed to give hardware analysts a common platform for the development of new algorithms with a portable design, ultimately aiding both professionals in their daily work as well as researchers in their efforts to publish reproducible results.

In this talk, we will first introduce the foundations and main challenges of HRE, before giving a live demonstration of HAL and some of its capabilities on selected case studies.
We conclude the talk with a glimpse at our associated research at the university that spans both, technical research as well as cross-disciplinary work with psychologists.

Our talk requires only minimum prior knowledge on digital hardware.

Design and implementation of an open-hardware, open-software Uninterruptible Power Supply unit.

This is the ultimate IoT board with wired 100Mb Ethernet Interface, Bluetooth LE, WiFi, Remote control IR, and CAN connectivity. The board can operate with single LiPo backup battery like UPS as it has an internal LiPo battery charger and a step-up converter. Two relays allows you to switch power appliances on and off.

Chisel is an open-source hardware construction language developed at UC Berkeley that supports advanced hardware design using highly parameterized generators and layered domain-specific hardware languages.

Hardware construction language (not C to Gates)
Embedded in the Scala programming language
Algebraic construction and wiring
Abstract data types and interfaces
Bulk connections
Hierarchical + object oriented + functional construction
Highly parameterizable using metaprogramming in Scala

Supports layering of domain specific languages
Sizeable standard library including floating-point units
Multiple clock domains
Generates low-level Verilog designed to pass on to standard ASIC or FPGA tools
Open source on github with modified BSD license
Complete set of docs
Growing community of adopters

There is now a complete Open Source tool chain for some FPGAs from Lattice Semiconductor. For a convincing video that these devices and the Open Source development tools are useful, see:

Introduction to the Open Source FPGA toolchain short or long@32c3 by Clifford Wolf

Forth on icestick by James Bowman

White Rabbit provides sub-nanosecond accuracy and picoseconds precision of synchronization for large distributed systems. It also allows for deterministic and reliable data delivery.
White Rabbit allows you to precision time-tag measured data and lets you trigger data taking in large installations while at the same time using the same network to transmit data.

• sub-nanosecond synchronization
• connecting thousands of nodes
• typical distances of 10 km between nodes
• Ethernet-based gigabit rate reliable data transfer
• fully open hardware, firmware and software
• multi-vendor commercially produced hardware

White Rabbit is a fully deterministic Ethernet-based network for general purpose data transfer and synchronization. It can synchronize over 1000 nodes with sub-ns accuracy over fiber lengths of up to 10 km. Commercially available.